1. Technical Field
The present invention relates to an electrically writable non-volatile storage device.
2. Related Art
A known related non-volatile memory is one in which, for example, plural memory cells are disposed at word lines WL and bit lines BL so as to form a memory array. Data is read out therefrom by sequentially connecting a read-out amplifier through a selection circuit to the bit line BL of the memory cell to be read out, and using the read-out amplifier to compare the magnitude of the voltage of the bit line connected to the memory cell against the magnitude of a reference voltage.
The memory cells are stored with data representing logic values of “1” or “0”. The magnitude of the voltage of the bit line BL changes according to the data stored in the memory cell to be read out, however when, for example, reading out a “0” after previously reading out a “1”, it takes time to charge the bit line BL until a stable state is achieved capable of determining a O-read. This is one cause of access delay.
There is technology described in Japanese Patent Application Laid-Open (JP-A) No. 2007-149296 to address this issue, in which pre-charging is performed to an internal voltage CSV generated by an internal power source when reading out data from the bit line BL, thereby speeding up data reading.
However, the magnitude of the internal voltage CSV does not always match the magnitude of a reference voltage. Accordingly, when the magnitude of the internal voltage CSV is greater than the magnitude of the reference voltage, overshoot occurs due to charging the bit line BL with pre-charging in excess of the magnitude of the reference voltage. In contrast, when the magnitude of the internal voltage CSV is less than the magnitude of the reference voltage, while the access period can be shorted by the pre-charging, time is still required for charging the bit line BL after pre-charging until a stable state can be achieved. An issue thus arises with such a related non-volatile memory in that sometimes an access delay arises due to the magnitude of the internal voltage CSV and the magnitude of the reference voltage not always matching. Note that “charging” in the present specification, in addition to the meaning of accumulating charge in a capacitance element is also employed with a wider meaning to applying a voltage to a wiring line. This definition is adopted in consideration of the parasitic capacitance that exists in wiring lines, and to accumulating charge in this parasitic capacitance.